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Co-Design of Quantum Software and Hardware
Co-Design of Quantum Software and Hardware
Co-Design of Quantum Software and Hardware

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자료유형  
 학위논문 서양
최종처리일시  
20250211152751
ISBN  
9798342122719
DDC  
620
저자명  
Cheng, Jinglei.
서명/저자  
Co-Design of Quantum Software and Hardware
발행사항  
[Sl] : Purdue University, 2024
발행사항  
Ann Arbor : ProQuest Dissertations & Theses, 2024
형태사항  
132 p
주기사항  
Source: Dissertations Abstracts International, Volume: 86-04, Section: B.
주기사항  
Advisor: Qian, Xuehai.
학위논문주기  
Thesis (Ph.D.)--Purdue University, 2024.
초록/해제  
요약Quantum computing is advancing rapidly, with variational quantum algorithms (VQAs) showing great promise for demonstrating quantum advantage on near-term devices. A critical component of VQAs is the ansatz, a parameterized quantum circuit that is iteratively optimized. However, compiling ansatz circuits for specific quantum hardware is challenging due to topological constraints, gate errors, and decoherence.This thesis presents a series of techniques to efficiently generate and optimize quantum circuits, with a focus on VQAs. We first introduce AccQOC, a framework combining static pre-compilation with accelerated dynamic compilation to transform quantum gates to hardware pulses using quantum optimal control (QOC). AccQOC generates pulses for frequently used gate sequences in advance and stores them in a lookup table. For new gate sequences, it utilizes a Minimum Spanning Tree based approach to find the optimal compilation order that maximizes the similarity between consecutive sequences, thereby accelerating the compilation process. By leveraging pre-computed pulses and employing a similarity-based approach, AccQOC achieves a 9.88xspeedup in compilation time compared to standard QOC methods while maintaining a 2.43xlatency reduction over gate-based compilation.Building on AccQOC, we propose EPOC, an extended framework integrating circuit partitioning, ZX-calculus optimization, and synthesis methods. EPOC operates at a finer granularity compared to previous coarse-grained approaches, decomposing circuits into smaller sub-circuits based on the number of qubits and circuit depth. It then applies synthesis techniques to identify equivalent representations with reduced gate count. The optimized sub-circuits are then grouped into larger unitary matrices, which are used as inputs for QOC. This approach enables increased parallelism and reduced latency in the resulting quantum pulses. Compared to the state-of-the-art pulse optimization framework, EPOC achieves a 31.74% reduction in circuit latency and a 76.80% reduction compared to gate-based methods.To construct hardware-efficient ansatz for VQAs, we introduce two novel approaches. TopGen is a topology-aware bottom-up approach that generates sub-circuits according to the connectivity constraints of the target quantum device. It starts by generating a library of subcircuits that are compatible with the device topology and evaluates them based on metrics 17 like expressibility and entangling capability. The sub-circuits with the best properties are then selected and progressively combined using different techniques. TopGen also employs dynamic circuit growth, where small sub-circuits are appended to the ansatz during training, and gate pruning, which removes gates with small parameters. Evaluated on a range of VQA tasks, TopGen achieves an average reduction of 50% in circuit depth after compilation compared to previous methods. NAPA takes a more direct approach by utilizing devicenative parametric pulses as the fundamental building blocks for constructing the ansatz. It uses cross-resonance pulses for entangling qubits and DRAG pulses for single-qubit rotations. The ansatz is constructed in a hardware-efficient manner. By using the better flexibility and expressivity of parametric pulses, NAPA demonstrates up to 97.3% latency reduction while maintaining accuracy comparable to gate-based approaches when evaluated on real quantum devices.Finally, we explore error mitigation techniques for VQAs at the pulse level. We develop a fidelity estimator based on reversed pulses, that enables randomized benchmarking of parametric pulses. This estimator compares the final state obtained after applying a sequence of pulses followed by their reversed counterparts to the initial state, using the probability of successful trials as a proxy for fidelity. Furthermore, we adapt the zero-noise extrapolation (ZNE) technique to the pulse level, enabling the error mitigation for quantum pulses. Applied to VQE tasks for H2 and HeH+ molecules, pulse-level ZNE reduces the deviation from ideal expectation values by an average of 54.1%.The techniques developed in this thesis advance the efficiency and practicality of VQAs on near-term quantum devices. The introduced frameworks, AccQOC and EPOC, provide efficient pulse optimization, while TopGen and NAPA can construct hardware-efficient ansatz. Besides, the pulse-level error mitigation techniques presented in this thesis improve the resilience of VQAs against the inherent noise and imperfections of NISQ devices. Together, these contributions help unlock the full potential of quantum computing and realize practical quantum advantages in the near future.
일반주제명  
Circuits
일반주제명  
Similarity measures
일반주제명  
Optimization techniques
일반주제명  
Graph representations
일반주제명  
Electrical engineering
기타저자  
Purdue University.
기본자료저록  
Dissertations Abstracts International. 86-04B.
전자적 위치 및 접속  
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MARC

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■1001  ▼aCheng,  Jinglei.
■24510▼aCo-Design  of  Quantum  Software  and  Hardware
■260    ▼a[Sl]▼bPurdue  University▼c2024
■260  1▼aAnn  Arbor▼bProQuest  Dissertations  &  Theses▼c2024
■300    ▼a132  p
■500    ▼aSource:  Dissertations  Abstracts  International,  Volume:  86-04,  Section:  B.
■500    ▼aAdvisor:  Qian,  Xuehai.
■5021  ▼aThesis  (Ph.D.)--Purdue  University,  2024.
■520    ▼aQuantum  computing  is  advancing  rapidly,  with  variational  quantum  algorithms  (VQAs)  showing  great  promise  for  demonstrating  quantum  advantage  on  near-term  devices.  A  critical  component  of  VQAs  is  the  ansatz,  a  parameterized  quantum  circuit  that  is  iteratively  optimized.  However,  compiling  ansatz  circuits  for  specific  quantum  hardware  is  challenging  due  to  topological  constraints,  gate  errors,  and  decoherence.This  thesis  presents  a  series  of  techniques  to  efficiently  generate  and  optimize  quantum  circuits,  with  a  focus  on  VQAs.  We  first  introduce  AccQOC,  a  framework  combining  static  pre-compilation  with  accelerated  dynamic  compilation  to  transform  quantum  gates  to  hardware  pulses  using  quantum  optimal  control  (QOC).  AccQOC  generates  pulses  for  frequently  used  gate  sequences  in  advance  and  stores  them  in  a  lookup  table.  For  new  gate  sequences,  it  utilizes  a  Minimum  Spanning  Tree  based  approach  to  find  the  optimal  compilation  order  that  maximizes  the  similarity  between  consecutive  sequences,  thereby  accelerating  the  compilation  process.  By  leveraging  pre-computed  pulses  and  employing  a  similarity-based  approach,  AccQOC  achieves  a  9.88xspeedup  in  compilation  time  compared  to  standard  QOC  methods  while  maintaining  a  2.43xlatency  reduction  over  gate-based  compilation.Building  on  AccQOC,  we  propose  EPOC,  an  extended  framework  integrating  circuit  partitioning,  ZX-calculus  optimization,  and  synthesis  methods.  EPOC  operates  at  a  finer  granularity  compared  to  previous  coarse-grained  approaches,  decomposing  circuits  into  smaller  sub-circuits  based  on  the  number  of  qubits  and  circuit  depth.  It  then  applies  synthesis  techniques  to  identify  equivalent  representations  with  reduced  gate  count.  The  optimized  sub-circuits  are  then  grouped  into  larger  unitary  matrices,  which  are  used  as  inputs  for  QOC.  This  approach  enables  increased  parallelism  and  reduced  latency  in  the  resulting  quantum  pulses.  Compared  to  the  state-of-the-art  pulse  optimization  framework,  EPOC  achieves  a  31.74%  reduction  in  circuit  latency  and  a  76.80%  reduction  compared  to  gate-based  methods.To  construct  hardware-efficient  ansatz  for  VQAs,  we  introduce  two  novel  approaches.  TopGen  is  a  topology-aware  bottom-up  approach  that  generates  sub-circuits  according  to  the  connectivity  constraints  of  the  target  quantum  device.  It  starts  by  generating  a  library  of  subcircuits  that  are  compatible  with  the  device  topology  and  evaluates  them  based  on  metrics  17  like  expressibility  and  entangling  capability.  The  sub-circuits  with  the  best  properties  are  then  selected  and  progressively  combined  using  different  techniques.  TopGen  also  employs  dynamic  circuit  growth,  where  small  sub-circuits  are  appended  to  the  ansatz  during  training,  and  gate  pruning,  which  removes  gates  with  small  parameters.  Evaluated  on  a  range  of  VQA  tasks,  TopGen  achieves  an  average  reduction  of  50%  in  circuit  depth  after  compilation  compared  to  previous  methods.  NAPA  takes  a  more  direct  approach  by  utilizing  devicenative  parametric  pulses  as  the  fundamental  building  blocks  for  constructing  the  ansatz.  It  uses  cross-resonance  pulses  for  entangling  qubits  and  DRAG  pulses  for  single-qubit  rotations.  The  ansatz  is  constructed  in  a  hardware-efficient  manner.  By  using  the  better  flexibility  and  expressivity  of  parametric  pulses,  NAPA  demonstrates  up  to  97.3%  latency  reduction  while  maintaining  accuracy  comparable  to  gate-based  approaches  when  evaluated  on  real  quantum  devices.Finally,  we  explore  error  mitigation  techniques  for  VQAs  at  the  pulse  level.  We  develop  a  fidelity  estimator  based  on  reversed  pulses,  that  enables  randomized  benchmarking  of  parametric  pulses.  This  estimator  compares  the  final  state  obtained  after  applying  a  sequence  of  pulses  followed  by  their  reversed  counterparts  to  the  initial  state,  using  the  probability  of  successful  trials  as  a  proxy  for  fidelity.  Furthermore,  we  adapt  the  zero-noise  extrapolation  (ZNE)  technique  to  the  pulse  level,  enabling  the  error  mitigation  for  quantum  pulses.  Applied  to  VQE  tasks  for  H2  and  HeH+  molecules,  pulse-level  ZNE  reduces  the  deviation  from  ideal  expectation  values  by  an  average  of  54.1%.The  techniques  developed  in  this  thesis  advance  the  efficiency  and  practicality  of  VQAs  on  near-term  quantum  devices.  The  introduced  frameworks,  AccQOC  and  EPOC,  provide  efficient  pulse  optimization,  while  TopGen  and  NAPA  can  construct  hardware-efficient  ansatz.  Besides,  the  pulse-level  error  mitigation  techniques  presented  in  this  thesis  improve  the  resilience  of  VQAs  against  the  inherent  noise  and  imperfections  of  NISQ  devices.  Together,  these  contributions  help  unlock  the  full  potential  of  quantum  computing  and  realize  practical  quantum  advantages  in  the  near  future.
■590    ▼aSchool  code:  0183.
■650  4▼aCircuits
■650  4▼aSimilarity  measures
■650  4▼aOptimization  techniques
■650  4▼aGraph  representations
■650  4▼aElectrical  engineering
■690    ▼a0544
■71020▼aPurdue  University.
■7730  ▼tDissertations  Abstracts  International▼g86-04B.
■790    ▼a0183
■791    ▼aPh.D.
■792    ▼a2024
■793    ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17163769▼nKERIS▼z이  자료의  원문은  한국교육학술정보원에서  제공합니다.

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