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Pushing Transport Layer Latency Down Towards its Physical Limits in Data Centers with Programmable Architectures and Algorithms
Pushing Transport Layer Latency Down Towards its Physical Limits in Data Centers with Prog...
Pushing Transport Layer Latency Down Towards its Physical Limits in Data Centers with Programmable Architectures and Algorithms

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자료유형  
 학위논문 서양
최종처리일시  
20250211151943
ISBN  
9798384201717
DDC  
001
저자명  
Arslan, Serhat.
서명/저자  
Pushing Transport Layer Latency Down Towards its Physical Limits in Data Centers with Programmable Architectures and Algorithms
발행사항  
[Sl] : Stanford University, 2024
발행사항  
Ann Arbor : ProQuest Dissertations & Theses, 2024
형태사항  
129 p
주기사항  
Source: Dissertations Abstracts International, Volume: 86-03, Section: B.
주기사항  
Advisor: McKeown, Nick;Katti, Sachin.
학위논문주기  
Thesis (Ph.D.)--Stanford University, 2024.
초록/해제  
요약Data center applications keep scaling horizontally across many machines to accommodate more users and data. This makes the communication performance requirements even more stringent, i.e., higher bandwidth and lower latency. The increasing link capacities address the bandwidth demands, but the latency requirements necessitate more sophisticated solutions.In this thesis, I observe that the transport layer is the only layer in the networking stack to impact latency both at the end-hosts and the network. The way it handles packets sets the end-hosts processing delay. And its congestion control determines the queuing delay in the network. Hence, I study transport layer designs to push both latencies down to their physical limits.First, I argue that end-host latency can be minimized by offloading the transport layer to NIC hardware, but fixed-function chips prohibit custom solutions for diversified environments. As a solution, I introduce nanoTransport, a programmable NIC architecture for message-based Remote Procedure Calls. It is programmed using the P4 language, making it easy to modify (or create) transport protocols while the packets are processed orders of magnitude faster than traditional software stacks. It identifies common events and primitive operations for a streamlined, modular, and programmable pipeline; including packetization, reassembly, timeouts, and packet generation, all expressed by the programmer.Next, I argue that network latency can only be minimized with quick and accurate congestion control decisions, which require precise congestion signals and the shortest control loop delay. I present Bolt to address these requirements and push congestion control to its theoretical limits. Bolt is based on three core ideas, (I) Sub-RTT Control (SRC) reacts to congestion faster than one RTT, (II) Proactive Ramp-up (PRU) foresees flow completions to promptly occupy released bandwidth, and (III) Supply matching (SM) matches bandwidth demand with supply to maximize utilization. I show that these mechanisms reduce 99th-p latency by 80% and improve 99th-p flow completion time by up to 3X compared to Swift and HPCC even at 400Gb/s.
일반주제명  
Software
일반주제명  
Control algorithms
일반주제명  
Response time
일반주제명  
Protocol
일반주제명  
Communication
일반주제명  
Queuing
일반주제명  
Design
일반주제명  
Network interface cards
일반주제명  
Web studies
기타저자  
Stanford University.
기본자료저록  
Dissertations Abstracts International. 86-03B.
전자적 위치 및 접속  
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MARC

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■006m          o    d                
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■020    ▼a9798384201717
■035    ▼a(MiAaPQ)AAI31324650
■035    ▼a(MiAaPQ)Stanfordzj481vg3597
■040    ▼aMiAaPQ▼cMiAaPQ
■0820  ▼a001
■1001  ▼aArslan,  Serhat.
■24510▼aPushing  Transport  Layer  Latency  Down  Towards  its  Physical  Limits  in  Data  Centers  with  Programmable  Architectures  and  Algorithms
■260    ▼a[Sl]▼bStanford  University▼c2024
■260  1▼aAnn  Arbor▼bProQuest  Dissertations  &  Theses▼c2024
■300    ▼a129  p
■500    ▼aSource:  Dissertations  Abstracts  International,  Volume:  86-03,  Section:  B.
■500    ▼aAdvisor:  McKeown,  Nick;Katti,  Sachin.
■5021  ▼aThesis  (Ph.D.)--Stanford  University,  2024.
■520    ▼aData  center  applications  keep  scaling  horizontally  across  many  machines  to  accommodate  more  users  and  data.  This  makes  the  communication  performance  requirements  even  more  stringent,  i.e.,  higher  bandwidth  and  lower  latency.  The  increasing  link  capacities  address  the  bandwidth  demands,  but  the  latency  requirements  necessitate  more  sophisticated  solutions.In  this  thesis,  I  observe  that  the  transport  layer  is  the  only  layer  in  the  networking  stack  to  impact  latency  both  at  the  end-hosts  and  the  network.  The  way  it  handles  packets  sets  the  end-hosts  processing  delay.  And  its  congestion  control  determines  the  queuing  delay  in  the  network.  Hence,  I  study  transport  layer  designs  to  push  both  latencies  down  to  their  physical  limits.First,  I  argue  that  end-host  latency  can  be  minimized  by  offloading  the  transport  layer  to  NIC  hardware,  but  fixed-function  chips  prohibit  custom  solutions  for  diversified  environments.  As  a  solution,  I  introduce  nanoTransport,  a  programmable  NIC  architecture  for  message-based  Remote  Procedure  Calls.  It  is  programmed  using  the  P4  language,  making  it  easy  to  modify  (or  create)  transport  protocols  while  the  packets  are  processed  orders  of  magnitude  faster  than  traditional  software  stacks.  It  identifies  common  events  and  primitive  operations  for  a  streamlined,  modular,  and  programmable  pipeline;  including  packetization,  reassembly,  timeouts,  and  packet  generation,  all  expressed  by  the  programmer.Next,  I  argue  that  network  latency  can  only  be  minimized  with  quick  and  accurate  congestion  control  decisions,  which  require  precise  congestion  signals  and  the  shortest  control  loop  delay.  I  present  Bolt  to  address  these  requirements  and  push  congestion  control  to  its  theoretical  limits.  Bolt  is  based  on  three  core  ideas,  (I)  Sub-RTT  Control  (SRC)  reacts  to  congestion  faster  than  one  RTT,  (II)  Proactive  Ramp-up  (PRU)  foresees  flow  completions  to  promptly  occupy  released  bandwidth,  and  (III)  Supply  matching  (SM)  matches  bandwidth  demand  with  supply  to  maximize  utilization.  I  show  that  these  mechanisms  reduce  99th-p  latency  by  80%  and  improve  99th-p  flow  completion  time  by  up  to  3X  compared  to  Swift  and  HPCC  even  at  400Gb/s.
■590    ▼aSchool  code:  0212.
■650  4▼aSoftware
■650  4▼aControl  algorithms
■650  4▼aResponse  time
■650  4▼aProtocol
■650  4▼aCommunication
■650  4▼aQueuing
■650  4▼aDesign
■650  4▼aNetwork  interface  cards
■650  4▼aWeb  studies
■690    ▼a0389
■690    ▼a0800
■690    ▼a0459
■690    ▼a0646
■71020▼aStanford  University.
■7730  ▼tDissertations  Abstracts  International▼g86-03B.
■790    ▼a0212
■791    ▼aPh.D.
■792    ▼a2024
■793    ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17162190▼nKERIS▼z이  자료의  원문은  한국교육학술정보원에서  제공합니다.

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