서브메뉴
검색
Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses
Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses
상세정보
- 자료유형
- 학위논문 서양
- 최종처리일시
- 20250211152837
- ISBN
- 9798384456186
- DDC
- 621.3
- 서명/저자
- Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses
- 발행사항
- [Sl] : University of Southern California, 2024
- 발행사항
- Ann Arbor : ProQuest Dissertations & Theses, 2024
- 형태사항
- 188 p
- 주기사항
- Source: Dissertations Abstracts International, Volume: 86-03, Section: B.
- 주기사항
- Advisor: Nuzzo, Pierluigi.
- 학위논문주기
- Thesis (Ph.D.)--University of Southern California, 2024.
- 초록/해제
- 요약The burgeoning costs of integrated circuit (IC) fabrication have led to widespread globalization of the IC supply chain, exposing IC designs to hardware security threats like intellectual property (IP) theft or piracy, illegal overproduction, and hardware Trojan insertion. These security challenges have triggered research on the exploration of secure design methodologies. However, the security solutions are often incomplete, leaving new channels of sensitive information leakage which must be considered. In this dissertation, we introduce novel analysis methods, attacks, and defenses based on graph learning, and specifically graph neural networks (GNNs), to address some of the information leakage challenges to trustworthy ICs. GNNs are particularly effective in processing circuit netlists, which are inherently graph-structured data. They can leverage the node properties of a circuit netlist and their neighborhood information to successfully perform different tasks. First, we present a state register identification technique with GNNs (ReIGNN) that enables circuit reverse engineering for hardware protection. ReIGNN combines, for the first time, GNNs with structural analysis to identify the state registers and help recover the control logic of a design. We then present a graph learning-driven attack (GLEAN) for analyzing the security guarantees of different logic obfuscation (or locking) methods by assessing the level of information leakage from their structural signatures. Graph learning can also be used to detect topologically and functionally similar logic gates or wires in a design, which in turn can be used to confuse existing machine learning-based attacks on logic obfuscation. In this context, we introduce a graph similarity-based logic locking technique (SimLL) which is the state-of-the-art defense against existing oracle-less learning-based attacks. We also introduce a reconfigurable logic-based locking technique which improves resilience against existing oracle-based attacks. Reconfigurable logic blocks like look-up table (LUT), and switch-boxes reduce the amount of information leaked from their structural signatures making them resilient against machine learning-based attacks too.Finally, security is a major concern for GNN models too. GNN models are highly vulnerable to adversarial attacks, where imperceptible perturbations to the input data can significantly impact their performance. To mitigate this vulnerability, we present a GNN training method that yields models that are sparse and compressed, yet adversarially robust. Overall, this dissertation explores the intersection of graph learning and hardware security highlighting the critical role of graph learning in fortifying hardware security as well as the importance of security considerations in graph learning.
- 일반주제명
- Electrical engineering
- 일반주제명
- Computer engineering
- 일반주제명
- Engineering
- 일반주제명
- Information technology
- 키워드
- Machine learning
- 키워드
- Logic locking
- 기타저자
- University of Southern California Electrical Engineering
- 기본자료저록
- Dissertations Abstracts International. 86-03B.
- 전자적 위치 및 접속
- 로그인 후 원문을 볼 수 있습니다.
MARC
008250123s2024 us c eng d■001000017164145
■00520250211152837
■006m o d
■007cr#unu||||||||
■020 ▼a9798384456186
■035 ▼a(MiAaPQ)AAI31561813
■040 ▼aMiAaPQ▼cMiAaPQ
■0820 ▼a621.3
■1001 ▼aDutta Chowdhury, Subhajit.
■24510▼aGraph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses
■260 ▼a[Sl]▼bUniversity of Southern California▼c2024
■260 1▼aAnn Arbor▼bProQuest Dissertations & Theses▼c2024
■300 ▼a188 p
■500 ▼aSource: Dissertations Abstracts International, Volume: 86-03, Section: B.
■500 ▼aAdvisor: Nuzzo, Pierluigi.
■5021 ▼aThesis (Ph.D.)--University of Southern California, 2024.
■520 ▼aThe burgeoning costs of integrated circuit (IC) fabrication have led to widespread globalization of the IC supply chain, exposing IC designs to hardware security threats like intellectual property (IP) theft or piracy, illegal overproduction, and hardware Trojan insertion. These security challenges have triggered research on the exploration of secure design methodologies. However, the security solutions are often incomplete, leaving new channels of sensitive information leakage which must be considered. In this dissertation, we introduce novel analysis methods, attacks, and defenses based on graph learning, and specifically graph neural networks (GNNs), to address some of the information leakage challenges to trustworthy ICs. GNNs are particularly effective in processing circuit netlists, which are inherently graph-structured data. They can leverage the node properties of a circuit netlist and their neighborhood information to successfully perform different tasks. First, we present a state register identification technique with GNNs (ReIGNN) that enables circuit reverse engineering for hardware protection. ReIGNN combines, for the first time, GNNs with structural analysis to identify the state registers and help recover the control logic of a design. We then present a graph learning-driven attack (GLEAN) for analyzing the security guarantees of different logic obfuscation (or locking) methods by assessing the level of information leakage from their structural signatures. Graph learning can also be used to detect topologically and functionally similar logic gates or wires in a design, which in turn can be used to confuse existing machine learning-based attacks on logic obfuscation. In this context, we introduce a graph similarity-based logic locking technique (SimLL) which is the state-of-the-art defense against existing oracle-less learning-based attacks. We also introduce a reconfigurable logic-based locking technique which improves resilience against existing oracle-based attacks. Reconfigurable logic blocks like look-up table (LUT), and switch-boxes reduce the amount of information leaked from their structural signatures making them resilient against machine learning-based attacks too.Finally, security is a major concern for GNN models too. GNN models are highly vulnerable to adversarial attacks, where imperceptible perturbations to the input data can significantly impact their performance. To mitigate this vulnerability, we present a GNN training method that yields models that are sparse and compressed, yet adversarially robust. Overall, this dissertation explores the intersection of graph learning and hardware security highlighting the critical role of graph learning in fortifying hardware security as well as the importance of security considerations in graph learning.
■590 ▼aSchool code: 0208.
■650 4▼aElectrical engineering
■650 4▼aComputer engineering
■650 4▼aEngineering
■650 4▼aInformation technology
■653 ▼aMachine learning
■653 ▼aGraph neural networks
■653 ▼aHardware security
■653 ▼aLogic locking
■653 ▼aReverse engineering
■690 ▼a0544
■690 ▼a0800
■690 ▼a0464
■690 ▼a0489
■690 ▼a0537
■71020▼aUniversity of Southern California▼bElectrical Engineering.
■7730 ▼tDissertations Abstracts International▼g86-03B.
■790 ▼a0208
■791 ▼aPh.D.
■792 ▼a2024
■793 ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17164145▼nKERIS▼z이 자료의 원문은 한국교육학술정보원에서 제공합니다.


