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A Bandwidth Extension Technique in BiCMOS Technology for Wideband Dividers
A Bandwidth Extension Technique in BiCMOS Technology for Wideband Dividers
상세정보
- 자료유형
- 학위논문 서양
- 최종처리일시
- 20250211153047
- ISBN
- 9798346810261
- DDC
- 621.3
- 저자명
- Chien, Hao-Yu.
- 서명/저자
- A Bandwidth Extension Technique in BiCMOS Technology for Wideband Dividers
- 발행사항
- [Sl] : University of California, Los Angeles, 2024
- 발행사항
- Ann Arbor : ProQuest Dissertations & Theses, 2024
- 형태사항
- 112 p
- 주기사항
- Source: Dissertations Abstracts International, Volume: 86-06, Section: B.
- 주기사항
- Advisor: Yang, Chih-Kong Ken;Chang, Mau-Chung Frank.
- 학위논문주기
- Thesis (Ph.D.)--University of California, Los Angeles, 2024.
- 초록/해제
- 요약As communication systems evolve to accommodate higher carrier frequencies and broader operating ranges, frequency dividers (FDs) in millimeter-wave circuits have become increasingly critical. They are essential for supporting multiband operation and frequency hopping technologies, particularly in applications that extend up to the low terahertz (THz) range.Frequency dividers (FDs) also serve as crucial components that connect the characteristics of the transistor level to the overall performance metrics of the circuit. Traditional figure-of-merit (FoM) assessments often emphasize intrinsic transistor properties. However, incorporating back-end-of-line (BEOL) metal parasitics is essential for accurate performance evaluations.Divider architectures can be categorized based on their operating range. For high frequency applications, dynamic or injection-locked (IL) dividers are favored for their low parasitic capacitance, simplicity, and efficiency. However, they suffer from a constrained dividing range. On the other hand, current-mode logic (CML) dividers, known for their robustness within the 1/3 to 1/2 ft region, offer a wider dividing range, but come with the drawback of significant DC power consumption. Techniques such as higher-order or distributed loads, multicore coupling, inductive peaking, and emitter follower insertion (EF) have been proposed to extend their dividing range.This research introduces a novel bandwidth extension approach using 45n m PDSOI BiCMOS technology to design static CML dividers. The methodology takes advantage of the complementary strengths of the CMOS and HBT devices to enhance the dividing performance. Mainstream SiGe BiCMOS technologies often face limitations when integrated with older CMOS processes. In contrast, this technology integrates advanced CMOS switches with high-speed HBT devices, significantly extending the dividing range and demonstrating the potential for efficient system-on-chip (SoC) designs suitable for high-speed RF front ends and multiband operations.Our results show that a conventional static CML divider can achieve a nearly 40% bandwidth increase using a PMOS resistor bank. The design operates with a maximum dividing frequency of 185 GHz and a minimum input frequency of 15 GHz, achieving a wide operating range that surpasses traditional static CML dividers while maintaining similar power efficiency to dynamic dividers. These findings position our approach as a promising solution for enhancing performance and flexibility in frequency divider design.
- 일반주제명
- Electrical engineering
- 일반주제명
- Engineering
- 일반주제명
- Condensed matter physics
- 기타저자
- University of California, Los Angeles Electrical and Computer Engineering 0333
- 기본자료저록
- Dissertations Abstracts International. 86-06B.
- 전자적 위치 및 접속
- 로그인 후 원문을 볼 수 있습니다.
MARC
008250123s2024 us c eng d■001000017164795
■00520250211153047
■006m o d
■007cr#unu||||||||
■020 ▼a9798346810261
■035 ▼a(MiAaPQ)AAI31641409
■040 ▼aMiAaPQ▼cMiAaPQ
■0820 ▼a621.3
■1001 ▼aChien, Hao-Yu.
■24512▼aA Bandwidth Extension Technique in BiCMOS Technology for Wideband Dividers
■260 ▼a[Sl]▼bUniversity of California, Los Angeles▼c2024
■260 1▼aAnn Arbor▼bProQuest Dissertations & Theses▼c2024
■300 ▼a112 p
■500 ▼aSource: Dissertations Abstracts International, Volume: 86-06, Section: B.
■500 ▼aAdvisor: Yang, Chih-Kong Ken;Chang, Mau-Chung Frank.
■5021 ▼aThesis (Ph.D.)--University of California, Los Angeles, 2024.
■520 ▼aAs communication systems evolve to accommodate higher carrier frequencies and broader operating ranges, frequency dividers (FDs) in millimeter-wave circuits have become increasingly critical. They are essential for supporting multiband operation and frequency hopping technologies, particularly in applications that extend up to the low terahertz (THz) range.Frequency dividers (FDs) also serve as crucial components that connect the characteristics of the transistor level to the overall performance metrics of the circuit. Traditional figure-of-merit (FoM) assessments often emphasize intrinsic transistor properties. However, incorporating back-end-of-line (BEOL) metal parasitics is essential for accurate performance evaluations.Divider architectures can be categorized based on their operating range. For high frequency applications, dynamic or injection-locked (IL) dividers are favored for their low parasitic capacitance, simplicity, and efficiency. However, they suffer from a constrained dividing range. On the other hand, current-mode logic (CML) dividers, known for their robustness within the 1/3 to 1/2 ft region, offer a wider dividing range, but come with the drawback of significant DC power consumption. Techniques such as higher-order or distributed loads, multicore coupling, inductive peaking, and emitter follower insertion (EF) have been proposed to extend their dividing range.This research introduces a novel bandwidth extension approach using 45n m PDSOI BiCMOS technology to design static CML dividers. The methodology takes advantage of the complementary strengths of the CMOS and HBT devices to enhance the dividing performance. Mainstream SiGe BiCMOS technologies often face limitations when integrated with older CMOS processes. In contrast, this technology integrates advanced CMOS switches with high-speed HBT devices, significantly extending the dividing range and demonstrating the potential for efficient system-on-chip (SoC) designs suitable for high-speed RF front ends and multiband operations.Our results show that a conventional static CML divider can achieve a nearly 40% bandwidth increase using a PMOS resistor bank. The design operates with a maximum dividing frequency of 185 GHz and a minimum input frequency of 15 GHz, achieving a wide operating range that surpasses traditional static CML dividers while maintaining similar power efficiency to dynamic dividers. These findings position our approach as a promising solution for enhancing performance and flexibility in frequency divider design.
■590 ▼aSchool code: 0031.
■650 4▼aElectrical engineering
■650 4▼aEngineering
■650 4▼aCondensed matter physics
■653 ▼aCurrent-mode logic
■653 ▼aFrequency dividers
■653 ▼aMillimeter-wave circuits
■653 ▼aHeterojunction bipolar transistors
■653 ▼aSilicon-on-insulator
■690 ▼a0544
■690 ▼a0537
■690 ▼a0611
■71020▼aUniversity of California, Los Angeles▼bElectrical and Computer Engineering 0333.
■7730 ▼tDissertations Abstracts International▼g86-06B.
■790 ▼a0031
■791 ▼aPh.D.
■792 ▼a2024
■793 ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17164795▼nKERIS▼z이 자료의 원문은 한국교육학술정보원에서 제공합니다.
