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Reliability and Security of Compute-In-Memory Based Deep Neural Network Accelerators
Reliability and Security of Compute-In-Memory Based Deep Neural Network Accelerators
상세정보
- 자료유형
- 학위논문 서양
- 최종처리일시
- 20260202105537
- ISBN
- 9798265400741
- DDC
- 004.6782
- 저자명
- Huang, Shanshi.
- 서명/저자
- Reliability and Security of Compute-In-Memory Based Deep Neural Network Accelerators
- 발행사항
- [Sl] : Georgia Institute of Technology, 2022
- 발행사항
- Ann Arbor : ProQuest Dissertations & Theses, 2022
- 형태사항
- 127 p
- 주기사항
- Source: Dissertations Abstracts International, Volume: 87-05, Section: B.
- 주기사항
- Advisor: Yu, Shimeng.
- 학위논문주기
- Thesis (Ph.D.)--Georgia Institute of Technology, 2022.
- 초록/해제
- 요약The proposed research aims to explore the reliability and security issues in compute-in-memory (CIM) design for accelerating deep neural network (DNN) algorithms. On one side, this research focuses on investigating and overcoming the impact of non-idealities in CIM designs. We first explore the design space of the CIM inference accelerator's quantization and mapping strategies. Several typical design options are analyzed and compared from both the software and hardware performance sides. Some design options are more robust and hardware friendly than others, inspiring further improvement in quantization and mapping strategies. The first work considers non-ideal effects from quantization and mapping strategies, with ideal circuits and devices assumed. Considering a more real-life situation, reliability issues caused by non-ideal circuits are studied. Specifically, the process variation is introduced to ADCs of the CIM inference engine, which causes the ADC offset. The effect of ADC offset on the software performance is evaluated, and an on-chip fine-tuning solution is proposed to compensate for the performance degradation. Embracing the benefit of on-chip fine-tuning, we explore the possibility of directly training on-chip of CIM accelerators with analog synapses under the non-idealities of devices and circuits. The in-situ training is proven feasible even under asymmetry/nonlinearity, device-to-device (D2D) variation, cycle-to-cycle (C2C) variation, and a limited number of states.On the other side, security vulnerabilities and countermeasures for SRAM-based CIM and eNVM-based CIM inference engines are investigated. The SRAM-based inference engine must download the model each time after power-on as it is volatile. Thus, we propose an XOR-CIM-based inference engine working in a two-party system, in which encryption and authentication are adopted considering data transmission between servers and edge devices. The eNVM-based engines mainly suffer from the information leaking problem brought by raw data stored in non-volatile memory. Inspired by the necessary onchip fine-tuning to recover the accuracy loss brought by the process variation, a physical unclonable function (PUF)-like scheme is proposed against the weight cloning attack and to mitigate the transferability of the adversarial examples.
- 일반주제명
- Edge computing
- 일반주제명
- Wire
- 일반주제명
- Cloning
- 일반주제명
- Neural networks
- 일반주제명
- Circuits
- 일반주제명
- Medical equipment
- 일반주제명
- Design
- 일반주제명
- Energy efficiency
- 일반주제명
- Breakdowns
- 일반주제명
- Software upgrading
- 일반주제명
- Engines
- 일반주제명
- Transistors
- 일반주제명
- Energy consumption
- 일반주제명
- Asymmetry
- 일반주제명
- Computer science
- 일반주제명
- Electrical engineering
- 일반주제명
- Information technology
- 일반주제명
- Medicine
- 일반주제명
- Sustainability
- 기본자료저록
- Dissertations Abstracts International. 87-05B.
- 전자적 위치 및 접속
- 로그인 후 원문을 볼 수 있습니다.
MARC
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■00520260202105537
■006m o d
■007cr#unu||||||||
■020 ▼a9798265400741
■035 ▼a(MiAaPQ)AAI32314894
■035 ▼a(MiAaPQ)GeorgiaTech70136
■040 ▼aMiAaPQ▼cMiAaPQ
■0820 ▼a004.6782
■1001 ▼aHuang, Shanshi.
■24510▼aReliability and Security of Compute-In-Memory Based Deep Neural Network Accelerators
■260 ▼a[Sl]▼bGeorgia Institute of Technology▼c2022
■260 1▼aAnn Arbor▼bProQuest Dissertations & Theses▼c2022
■300 ▼a127 p
■500 ▼aSource: Dissertations Abstracts International, Volume: 87-05, Section: B.
■500 ▼aAdvisor: Yu, Shimeng.
■5021 ▼aThesis (Ph.D.)--Georgia Institute of Technology, 2022.
■520 ▼aThe proposed research aims to explore the reliability and security issues in compute-in-memory (CIM) design for accelerating deep neural network (DNN) algorithms. On one side, this research focuses on investigating and overcoming the impact of non-idealities in CIM designs. We first explore the design space of the CIM inference accelerator's quantization and mapping strategies. Several typical design options are analyzed and compared from both the software and hardware performance sides. Some design options are more robust and hardware friendly than others, inspiring further improvement in quantization and mapping strategies. The first work considers non-ideal effects from quantization and mapping strategies, with ideal circuits and devices assumed. Considering a more real-life situation, reliability issues caused by non-ideal circuits are studied. Specifically, the process variation is introduced to ADCs of the CIM inference engine, which causes the ADC offset. The effect of ADC offset on the software performance is evaluated, and an on-chip fine-tuning solution is proposed to compensate for the performance degradation. Embracing the benefit of on-chip fine-tuning, we explore the possibility of directly training on-chip of CIM accelerators with analog synapses under the non-idealities of devices and circuits. The in-situ training is proven feasible even under asymmetry/nonlinearity, device-to-device (D2D) variation, cycle-to-cycle (C2C) variation, and a limited number of states.On the other side, security vulnerabilities and countermeasures for SRAM-based CIM and eNVM-based CIM inference engines are investigated. The SRAM-based inference engine must download the model each time after power-on as it is volatile. Thus, we propose an XOR-CIM-based inference engine working in a two-party system, in which encryption and authentication are adopted considering data transmission between servers and edge devices. The eNVM-based engines mainly suffer from the information leaking problem brought by raw data stored in non-volatile memory. Inspired by the necessary onchip fine-tuning to recover the accuracy loss brought by the process variation, a physical unclonable function (PUF)-like scheme is proposed against the weight cloning attack and to mitigate the transferability of the adversarial examples.
■590 ▼aSchool code: 0078.
■650 4▼aEdge computing
■650 4▼aWire
■650 4▼aCloning
■650 4▼aNeural networks
■650 4▼aCircuits
■650 4▼aMedical equipment
■650 4▼aDesign
■650 4▼aEnergy efficiency
■650 4▼aBreakdowns
■650 4▼aSoftware upgrading
■650 4▼aEngines
■650 4▼aTransistors
■650 4▼aEnergy consumption
■650 4▼aAsymmetry
■650 4▼aComputer science
■650 4▼aElectrical engineering
■650 4▼aInformation technology
■650 4▼aMedicine
■650 4▼aSustainability
■690 ▼a0389
■690 ▼a0800
■690 ▼a0984
■690 ▼a0544
■690 ▼a0489
■690 ▼a0564
■690 ▼a0640
■71020▼aGeorgia Institute of Technology.
■7730 ▼tDissertations Abstracts International▼g87-05B.
■790 ▼a0078
■791 ▼aPh.D.
■792 ▼a2022
■793 ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17360503▼nKERIS▼z이 자료의 원문은 한국교육학술정보원에서 제공합니다.


