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Topics in Extreme System Design
Topics in Extreme System Design
상세정보
- 자료유형
- 학위논문 서양
- 최종처리일시
- 20260202103556
- ISBN
- 9798288864667
- DDC
- 004
- 저자명
- Luo, Zhihong.
- 서명/저자
- Topics in Extreme System Design
- 발행사항
- [Sl] : University of California, Berkeley, 2025
- 발행사항
- Ann Arbor : ProQuest Dissertations & Theses, 2025
- 형태사항
- 167 p
- 주기사항
- Source: Dissertations Abstracts International, Volume: 87-01, Section: B.
- 주기사항
- Advisor: Shenker, Scott;Ratnasamy, Sylvia.
- 학위논문주기
- Thesis (Ph.D.)--University of California, Berkeley, 2025.
- 초록/해제
- 요약This dissertation presents a series of systems that push the boundaries of what is considered feasible and widely accepted in the design of datacenter and cellular infrastructures. The first part focuses on improving datacenter efficiency through finer-grained software mechanisms. It introduces software systems that harvest memory-bound CPU stall cycles for useful work and perform object-level memory management in tiered memory systems. The second part explores how cellular network functionality can be expanded through clean-slate architectural redesigns. It introduces systems that challenge entrenched assumptions around network control and user privacy, demonstrating the feasibility of more open and privacy-preserving models.The first system, MSH, targets the underutilization of memory-bound CPU stall cycles, which represent a significant inefficiency in datacenter workloads. Traditional hardware-based approaches like simultaneous multithreading (SMT) are limited in configurability and concurrency, especially for latency-sensitive services. MSH is a software system that transparently and efficiently harvests stall cycles using a co-design of profiling, static analysis, binary instrumentation, and runtime scheduling. It achieves high throughput with minimal latency overhead, outperforming SMT in scenarios where SMT cannot be used due to the latency requirement.The second system, Fava, addresses the challenge of effective data placement in tiered memory systems combining fast local memory with slower disaggregated options such as CXL-attached memory. Unlike prior approaches that operate at the page or cache-line level, Fava enables object-level memory management in managed-language environments. It accurately tracks object hotness with minimal overhead and leverages a hybrid mechanism combining object colocation with page migration. As a result, Fava significantly improves local memory utilization and reduces application slowdowns compared to state-of-the-art systems.The third system, CellBricks, introduces a novel cellular architecture that lowers the barrier to entry for new network operators. By moving key functionality such as mobility and user management out of the network and into end hosts, CellBricks enables users to dynamically access service from a variety of operators, including small-scale and untrusted ones. This design fosters greater competition and flexibility while maintaining performance comparable to traditional infrastructure.Finally, LOCA tackles the long-standing issue of location privacy in cellular networks. Today's architectures allow operators to track both the identity and location of users, posing serious privacy risks. LOCA decouples location information from identity while preserving support for identity-based services such as billing, lawful intercept, and emergency access. Leveraging MVNO-based deployments, LOCA redesigns key cellular protocols using cryptographic primitives to deliver strong privacy guarantees without sacrificing scalability or service quality.Together, these four systems demonstrate how rethinking software mechanisms and architectural designs can lead to meaningful gains in efficiency, performance, openness, and privacy across modern computing infrastructure.
- 일반주제명
- Computer science
- 일반주제명
- Computer engineering
- 일반주제명
- Information technology
- 키워드
- CellBricks
- 키워드
- Software systems
- 기타저자
- University of California, Berkeley Electrical Engineering & Computer Sciences
- 기본자료저록
- Dissertations Abstracts International. 87-01B.
- 전자적 위치 및 접속
- 로그인 후 원문을 볼 수 있습니다.
MARC
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■007cr#unu||||||||
■020 ▼a9798288864667
■035 ▼a(MiAaPQ)AAI32042073
■040 ▼aMiAaPQ▼cMiAaPQ
■0820 ▼a004
■1001 ▼aLuo, Zhihong.
■24510▼aTopics in Extreme System Design
■260 ▼a[Sl]▼bUniversity of California, Berkeley▼c2025
■260 1▼aAnn Arbor▼bProQuest Dissertations & Theses▼c2025
■300 ▼a167 p
■500 ▼aSource: Dissertations Abstracts International, Volume: 87-01, Section: B.
■500 ▼aAdvisor: Shenker, Scott;Ratnasamy, Sylvia.
■5021 ▼aThesis (Ph.D.)--University of California, Berkeley, 2025.
■520 ▼aThis dissertation presents a series of systems that push the boundaries of what is considered feasible and widely accepted in the design of datacenter and cellular infrastructures. The first part focuses on improving datacenter efficiency through finer-grained software mechanisms. It introduces software systems that harvest memory-bound CPU stall cycles for useful work and perform object-level memory management in tiered memory systems. The second part explores how cellular network functionality can be expanded through clean-slate architectural redesigns. It introduces systems that challenge entrenched assumptions around network control and user privacy, demonstrating the feasibility of more open and privacy-preserving models.The first system, MSH, targets the underutilization of memory-bound CPU stall cycles, which represent a significant inefficiency in datacenter workloads. Traditional hardware-based approaches like simultaneous multithreading (SMT) are limited in configurability and concurrency, especially for latency-sensitive services. MSH is a software system that transparently and efficiently harvests stall cycles using a co-design of profiling, static analysis, binary instrumentation, and runtime scheduling. It achieves high throughput with minimal latency overhead, outperforming SMT in scenarios where SMT cannot be used due to the latency requirement.The second system, Fava, addresses the challenge of effective data placement in tiered memory systems combining fast local memory with slower disaggregated options such as CXL-attached memory. Unlike prior approaches that operate at the page or cache-line level, Fava enables object-level memory management in managed-language environments. It accurately tracks object hotness with minimal overhead and leverages a hybrid mechanism combining object colocation with page migration. As a result, Fava significantly improves local memory utilization and reduces application slowdowns compared to state-of-the-art systems.The third system, CellBricks, introduces a novel cellular architecture that lowers the barrier to entry for new network operators. By moving key functionality such as mobility and user management out of the network and into end hosts, CellBricks enables users to dynamically access service from a variety of operators, including small-scale and untrusted ones. This design fosters greater competition and flexibility while maintaining performance comparable to traditional infrastructure.Finally, LOCA tackles the long-standing issue of location privacy in cellular networks. Today's architectures allow operators to track both the identity and location of users, posing serious privacy risks. LOCA decouples location information from identity while preserving support for identity-based services such as billing, lawful intercept, and emergency access. Leveraging MVNO-based deployments, LOCA redesigns key cellular protocols using cryptographic primitives to deliver strong privacy guarantees without sacrificing scalability or service quality.Together, these four systems demonstrate how rethinking software mechanisms and architectural designs can lead to meaningful gains in efficiency, performance, openness, and privacy across modern computing infrastructure.
■590 ▼aSchool code: 0028.
■650 4▼aComputer science
■650 4▼aComputer engineering
■650 4▼aInformation technology
■653 ▼aCellBricks
■653 ▼aSimultaneous multithreading
■653 ▼aSoftware systems
■653 ▼aNetwork operators
■653 ▼aCellular networks
■690 ▼a0984
■690 ▼a0489
■690 ▼a0464
■71020▼aUniversity of California, Berkeley▼bElectrical Engineering & Computer Sciences.
■7730 ▼tDissertations Abstracts International▼g87-01B.
■790 ▼a0028
■791 ▼aPh.D.
■792 ▼a2025
■793 ▼aEnglish
■85640▼uhttp://www.riss.kr/pdu/ddodLink.do?id=T17357758▼nKERIS▼z이 자료의 원문은 한국교육학술정보원에서 제공합니다.


